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Product Specification
PE42552
SPDT UltraCMOS? RF Switch
Product Description
The PE42552 RF Switch is designed for use in Test/ATE,
cellular and other wireless applications. This broadband general
purpose switch maintains excellent RF performance and
linearity from DC through 7500 MHz. The PE42552 integrates
DC - 7500 MHz
Features
? HaRP?-Technology-Enhanced
? Eliminates Gate and Phase Lag
? No insertion loss or phase drift
on-board CMOS control logic driven by a single-pin, low voltage
?
Fast settling time
CMOS control input. It also has a logic select pin which enables
changing the logic definition of the control pin. Additional
features include a novel user defined logic table, enabled by the
on-board CMOS circuitry. The PE42552 also exhibits
outstanding isolation of 44 dB at 7500 MHz, fast settling time,
and is offered in a tiny 3x3 mm QFN package.
The PE42552 is manufactured on Peregrine’s UltraCMOS?
process, a patented variation of silicon-on-insulator (SOI)
technology on a sapphire substrate, offering the performance of
GaAs with the economy and integration of conventional CMOS.
Figure 1. Functional Diagram
?
?
?
?
?
?
?
?
High linearity: 65 dBm IIP3
Low insertion loss: 0.65 dB at 3.0 GHz,
0.85 dB at 6.0 GHz, 1.0 at 7.5 GHz
High isolation of 47 dB at 3.0 GHz,
44 dB at 7.5 GHz
1 dB compression point: +34.5 dBm typ.
Logic Select pin to invert logic control
High ESD: 1000 V HBM
Absorptive switch design
Standard 3x3 mm QFN package
RFC
Figure 2. Package Type
16-lead 3x3 mm QFN
RF1
ESD
50 ?
CMOS
ESD
50 ?
RF2
Control
Driver
LS CTRL
Table 1. Target Electrical Specifications Temp = 25°C, V DD = 3.3V , V SS = 0V / -3.3V
Parameter
Conditions
Min
Typical
Max
Units
Operation Frequency MHz
9 kHz
7.5 GHz
9 KHz
0.6
0.7
dB
Insertion Loss
3000 MHz
6000 MHz
7500 MHz
3000 MHz
45
0.65
0.85
1.0
47
0.8
1.0
1.22
dB
dB
dB
dB
Isolation – RF1 to RF2
Isolation – RFC to RFX
Return Loss
6000 MHz
7500 MHz
3000 MHz
6000 MHz
7500 MHz
3000 MHz
6000 MHz
7500 MHz
32
25
44
49
37
34
28
47
55
44
20
25
15
dB
dB
dB
dB
dB
dB
dB
dB
Settling Time
Switching Time
50% CTRL to 0.05 dB final value (-40 to +85 °C) Rising Edge
50% CTRL to 0.05 dB final value (-40 to +85 °C) Falling Edge
50% CTRL to 90% or 10% of final value (-40 to +85 °C)
9
15
5
11
45
7
μ s
μ s
μ s
Input 1 dB Compression
Input IP3
Input IP2
800 MHz
7500 MHz
7500 MHz
7500 MHz
32
34.5
34
65
100
dBm
dBm
dBm
dBm
Document No. 70-0246-03 │ www.psemi.com
?2008 Peregrine Semiconductor Corp. All rights reserved.
Page 1 of 9
Logo updated under non-rev change. Peregrine products are protected under one or more of the following U.S. Patents: http://patents.psemi.com
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